NXP Semiconductors
HF full bridge driver IC
PINNING
Product specification
UBA2033
SYMBOL
? LVS
EXTDR
+ LVS
PIN
1
2
3
DESCRIPTION
negative supply voltage (for logic
input)
oscillator signal input
positive supply voltage (for logic
input)
n.c.
4
not connected
handbook, halfpage
? LVS
1
28 GHR
n.c.
5
not connected
EXTDR 2
27 FSR
HV
6
high voltage supply input
+ LVS
3
26 SHR
n.c.
n.c.
V DD
SU
7
8
9
10
not connected
not connected
internal low voltage supply
input signal for start-up delay
n.c. 4
n.c. 5
HV 6
25 n.c.
24 n.c.
23 GLR
DD
BD
RC
SGND
GHL
FSL
SHL
n.c.
n.c.
GLL
11
12
13
14
15
16
17
18
19
20
divider disable input
bridge disable control input
RC input for internal oscillator
signal ground
gate of higher left output MOSFET
floating supply voltage left
source of higher left MOSFET
not connected
not connected
gate of lower left output MOSFET
n.c. 7
n.c. 8
VDD 9
SU 10
DD 11
BD 12
RC 13
SGND 14
UBA2033TS
MBL458
22 n.c.
21 PGND
20 GLL
19 n.c.
18 n.c.
17 SHL
16 FSL
15 GHL
PGND
n.c.
GLR
n.c.
n.c.
SHR
21
22
23
24
25
26
power ground
not connected
gate of lower right output MOSFET
not connected
not connected
source of higher right MOSFET
FSR
GHR
2002 Oct 08
27
28
floating supply voltage right
gate of higher right output MOSFET
4
Fig.2 Pin configuration.
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